NOR SWITCH USING CMOS module switchnor(out,a,b); output out; input a,b; supply1 pwr; supply0 gnd; wire w1; pmos (w1,a,pwr); pmos (out,b,w1); nmos (out,a,gnd); nmos (out,b,gnd); endmodule
Is RTL generation of above code is possible then how to proceed for RTL generation in verilog coding as I am unable to do in verilog and it is easy through VHDL, I am using Xilinx 9.1i
Is RTL generation of above code is possible then how to proceed for RTL generation in verilog coding as I am unable to do in verilog and it is easy through VHDL, I am using Xilinx 9.1i
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