Saturday 4 July 2015

Counters- MOD12 Up counter


MOD 12 UP COUNTER
module mod12upcounter(out,rst,clk);
output [3:0]out;
input rst,clk;
reg [3:0]out;
always @(posedge clk)
begin
if(rst|out==4'b1011)
out<=4'b0000;
else
out<=out+1;
end
endmodule

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